Basics of VLSI Design

The app is a complete free handbook of VLSI with diagrams and graphs. It is part of electronics & communications engineering education which brings important topics, notes, news & blog on the subject. Download the App as quick reference guide & ebook on this electronics & communications engineering subject.

The app covers more than 90 topics of VLSI Design in detail. These topics are divided in 5 units.

You can very easily pass and succeed in your exams or interviews, the app provides quick revision and reference to the topics like a detailed flash card.

Each topic is complete with diagrams, equations and other forms of graphical representations for easy understanding. Some of topics Covered in this application are:

1. Semiconductor memories :Introduction and types

2. Read Only Memory (ROM)

3. Three transistor DRAM cell

4. One transistor DRAM Cell

5. Flash memory

6. Low - Power CMOS Logic Circuits: Introduction

7. Design of CMOS inverters

8. MOS Inverters : introduction to switching characteristics

9. Scan-Based Techniques

10. Built-In Self Test (BIST) Techniques

11. Historical prospective of VLSI Design : Moore's Law

12. Classification of CMOS digital circuit types

13. A Circuit Design Example

14. VLSI Design methodologies

15. VLSI Design flow

16. Design Hierarchy

17. Concept of regularity, modularity and locality

18. CMOS fabrication

19. Fabrication Process Flow : Basic Steps

20. Fabrication of the nMOS transistor

21. CMOS fabrication : p-well process

22. CMOS fabrication : n-well process

23. CMOS fabrication : twin tub process

24. Stick diagrams and mask layout design

25. MOS transistor : physical structure

26. The MOS System under External Bias

27. Structure and operation of MOSFET

28. The threshold voltage

29. Current voltage characteristics of MOSFET

30. Mosfet scaling

31. Effects of scaling

32. Small Geometry Effects

33. MOS Capacitances

34. MOS inverter

35. Voltage transfer characteristics (VTC) of MOS inverter

36. Inverters with n-type MOSFET load

37. Resistive load inverter

38. Design of Depletion-Load Inverters

39. CMOS inverter

40. Delay time definitions

41. Calculation of Delay Times

42. Inverter Design with Delay Constrains : Example

43. Combinational MOS Logic Circuits : introduction

44. MOS Logic Circuits with Depletion nMOS Loads : Two-Input NOR Gate

45. MOS Logic Circuits with Depletion nMOS Loads : Generalized NOR structure with multiple inputs

46. MOS Logic Circuits with Depletion nMOS Loads : Transient analysis of NOR gate

47. MOS Logic Circuits with Depletion nMOS Loads : Two-Input NAND Gate

48. MOS Logic Circuits with Depletion nMOS Loads : Generalized NAND structure with multiple inputs

49. MOS Logic Circuits with Depletion nMOS Loads : Transient analysis of NAND gate

50. CMOS logic circuits : NOR2 (two input NOR ) gate

51. CMOS NAND2 (two input NAND) gate

52. Layout of Simple CMOS Logic Gates

53. Complex Logic Circuits

54. Complex CMOS Logic Gates

55. Layout of Complex CMOS Logic Gates

56. AOI and OAI Gates

57. Pseudo-nMOS Gates

58. CMOS Full-Adder Circuit & carry ripple adder

59. CMOS Transmission Gates (Pass Gates)

60. Complementary Pass-Transistor Logic (CPL)

61. Sequential MOS logic Circuits : Introduction

62. Behavior of Bistable Elements

63. The SR Latch Circuit

64. Clocked SR Latch

65. Clocked JK Latch

66. Master-Slave Flip-Flop

67. CMOS D-Latch and Edge-Triggered Flip-Flop

68. Dynamic Logic Circuits : Introduction

69. Basic Principles of Pass Transistor Circuits

All topics are not listed because of character limitations set by the Play Store.

该应用程序是VLSI的完全自由使用手册图表和图形。它是电子及通信工程教育带来重要的主题，笔记，新闻和博客关于这个问题的一部分。下载App作为快速参考指南和电子书在这个电子与通信工程学科。

该应用程序涵盖了详细的90多个主题VLSI设计。这些主题在5个单位划分。

你可以很容易地通过，并在你的考试或面试成功，应用程序提供了快速修改和参考像一个详细的闪存卡的主题。

每个主题都配有图表，方程式等形式，为便于理解的图形表示。一些在此应用中涉及的主题有：

1.半导体存储器：介绍和类型

2，只读存储器（ROM）

3.三个晶体管DRAM单元

4.一个晶体管DRAM单元

5.闪存

6.低 - 功耗CMOS逻辑电路：简介

7. CMOS反相器的设计

8. MOS逆变器：介绍开关特性

9.基于扫描技术

10.内置自测试（BIST）技术

11.历史前瞻性VLSI设计：摩尔定律

12. CMOS数字电路类型分类

13.电路设计实例

14. VLSI设计方法

15. VLSI设计流程

16.设计层次

17.规律性，模块化和局部性的概念

18. CMOS制造

19.制作工艺流程：基本步骤

20.制备nMOS晶体管的

21. CMOS制造：P阱工艺

22. CMOS制造：N阱工艺

23. CMOS制造：双桶过程

24.棒图和掩膜版图设计

25. MOS晶体管：物理结构

在外部偏置26 MOS系统

27.结构和MOSFET的操作

28.阈值电压

MOSFET的电流29.电压特性

30.场效应管结垢

缩放31.影响

32.小尺寸效应

33. MOS的电容

34. MOS逆变器

35.电压传输特性MOS逆变器（VTC）

36.逆变器与n型MOSFET负载

37.阻性负载变频器

耗尽型负载逆变器38设计

39. CMOS反相器

40.延迟时间定义

41.计算延迟时间

42.逆变器设计与延迟约束：例

43.组合MOS逻辑电路：介绍

44. MOS逻辑电路枯竭的nMOS负载：双输入或非门

45. MOS逻辑电路枯竭的nMOS负载：广义NOR结构多输入

46. MOS逻辑电路枯竭的nMOS负载：NOR门电路的瞬态分析

47. MOS逻辑电路枯竭的nMOS负载：双输入与非门

48. MOS逻辑电路枯竭的nMOS负载：广义NAND结构多输入

49. MOS逻辑电路枯竭的nMOS负载：与非门的瞬态分析

50. CMOS逻辑电路：NOR2（两个输入NOR）门

51. CMOS NAND2（两个输入NAND）门

简单的CMOS逻辑门的52布局

53.复杂的逻辑电路

54.复杂的CMOS逻辑门

复杂的CMOS逻辑门的55布局

56. AOI和OAI盖茨

57.伪nMOS的门

58. CMOS全加器电路及纹波进行加法

59. CMOS传输门（通门）

60.互补通 - 晶体管逻辑（CPL）

61. MOS时序逻辑电路：简介

62.行为双稳态元素

63. SR锁存电路

64.时钟控制SR锁存器

65.时钟控制JK锁存

66.主从触发器

67. CMOS D锁存器和边沿触发触发器

68.动态逻辑电路：简介

通晶体管电路69.基本原则

所有的话题都没有列出，因为Play商店设置字符限制的。